Fujitsu Semiconductor standardizes on Mentor Graphics HyperLynx signal integrity technology
Mentor Graphics Corporation announced that Fujitsu Semiconductor has standardized on the Mentor Graphics® HyperLynx® Signal Integrity technology as the company’s LSI-IC Packaging (PKG)-Printed Circuit Board (PCB) co-design tool for fast and accurate high-speed simulation and analysis.
Bus speeds are getting faster and the demand for noise timing-aware LSI-PKG-PCB co-design is increasing. Fujitsu Semiconductor adopted the HyperLynx product suite to address problems caused by high-speed signals throughout the design cycle, from early architectural stages through post-layout verification.
Fujitsu Semiconductor needed to address timing issues at three levels: LSI, PKG, and PCB, especially with the rapidly emerging DDR2/3/4 and SERDES interconnect standards. They selected the Mentor Graphics HyperLynx technology as their robust signal and power integrity solution. They needed to standardize their LSI-PKG-PCB co-design environment with easy-to-use, yet highly accurate, simulation for global adoption. Fujitsu Semiconductor deployed HyperLynx for a special project in 2010, basing their standardization on the Mentor® HyperLynx product providing the leading signal and power integrity technology in the industry and Mentor’s ability to provide superior global customer support.
“We have positioned HyperLynx as our company and our customers’ analysis tool that has been widely popular in our customers’ PCB design workflow, and in collaboration with Mentor Graphics, we developed a design kit that accurately and quickly analyzes the signal integrity and timing of PCBs by addressing the noise and timing influences of LSI and PKG on HyperLynx,” said Naoshi Higaki, Deputy General Manager of SoC Design Engineering Division, Fujitsu Semiconductor Limited. “By using this design kit as our company and customers’ common environment, it enhances our customers’ final products with higher reliability, design productivity, and cost-effective development.”
As memory bus speeds get faster, timing margins become more severe, impacting simultaneous switching noise and timing design. For good quality control and optimized performance, this affects the ICs, the packaging, and the printed boards. This includes traditional challenges such as signal crosstalk, over-shooting and under-shooting. Since the HyperLynx product is easy-to-use and provides an intuitive user interface, all members of the product development team (hardware engineers, PCB designers and signal integrity specialists) can use it, from pre-layout analysis and simulation to post-layout verification.
To learn more about the Mentor’s HyperLynx advanced signal integrity analysis product, visit the company website at: http://www.mentor.com/products/pcb-system-design/circuit-simulation/hyperlynx-signal-integrity.
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